Job Description

Founding Hardware Engineer- AI Data Center Security Infrastructure

Founding Hardware Engineer- AI Data Center Security Infrastructure

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This range is provided by Theery. Your actual pay will be based on your skills and experience talk with your recruiter to learn more.

Base pay range

$200,000.00/yr - $400,000.00/yr

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About the Role

Were forming a new team to build foundational security technology for the future of artificial intelligence. As AI reshapes every industry, data centers are evolving into critical national infrastructureyet their security remains dangerously underdeveloped. We're creating hardware and system-level defenses designed to secure some of the most valuable compute and data assets on the planet.

As a Founding Engineer , youll help define the architecture, build the core technology, and set the engineering culture for a team focused on secure systems at the bleeding edge of scale. Our mission: protect AI model data, interconnects, and control surfaces across GPU-dense environmentsstarting from first principles.

What Youll Be Building

Youll join at the inception stage of a new effort aimed at securing AI infrastructure at its physical and logical roots. Your work will span high-throughput FPGA-based switching, hardware-level access controls, and secure execution pathsbuilt for real-world deployment across hyperscale AI clusters.

This isnt a peripheral security product. Its a foundational layer designed for environments running 200,000+ GPUs, with workloads crossing petabit networks and exabyte-scale memory systems.

Key Responsibilities

• Design and implement FPGA-based switching and flow control that enforces policy at line rate, even in adversarial conditions. Think high-speed packet tagging, segmentation, and encrypted transport at the silicon level.
• Build secure, verifiable execution paths by integrating with TEEs and silicon root-of-trust technologies. Ensure workloads can run securely in zero-trust environments.
• Co-design with system, networking, and infrastructure teams to build a secure data movement layer for AI workloadsacross racks, rows, and regions.
• Formal Methods + Threat-Oriented Verification
• Go beyond functional correctness to build proofs of resilience. Apply formal methods to demonstrate resistance to known and novel attack vectors.
• Security-Hardened Hardware Prototyping
• Build prototypes that can withstand physical, side-channel, and firmware-layer attacks. Drive the design of tamper-resistant enclosures, trusted boot flows, and secure update pipelines.

What Youll Do

• Lay down the architectural foundation for a new generation of secure compute infrastructure
• Work closely with data center operators and AI platform teams to test and refine early systems in real deployment environments
• Build from first silicon to production-ready systems protecting critical AI models and infrastructure
• Help define the security bar for AI data centers globallystarting now, while the stack is still malleable

Ideal Background

• 4+ years of experience in FPGA, ASIC, or secure hardware design
• Strong grounding in security principles, threat modeling, and low-level systems design
• Experience building or securing high-bandwidth systems (e.g., RDMA, PCIe, NVLink, RoCE, etc.)
• Familiarity with Confidential Computing, TEEs, or secure enclave technologies
• Bonus: Experience working at the intersection of hardware, software, and infrastructure at scale

Please apply here with your updated resume or send directly to Kevin@Theery.com

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Industries

  Semiconductor Manufacturing and Computer Hardware Manufacturing

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